abstract class RegFile[A, C[T]] extends Top[C[A]] with LocalMem[A, C]
An N-dimensional register file
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final
def
!=(arg0: Any): Boolean
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def
!==(that: Any): argon.lang.Bit
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def
##(): Int
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def
++(that: Any): argon.lang.Text
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def
==(arg0: Any): Boolean
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def
===(that: Any): argon.lang.Bit
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- val A: lang.Bits[A]
-
def
M1: Type[RegFile1[A]]
- Attributes
- protected
-
def
M2: Type[RegFile2[A]]
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def
M3: Type[RegFile3[A]]
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val
__neverMutable: Boolean
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- def __read(addr: Seq[lang.Idx], ens: Set[lang.Bit]): A
- def __reset(ens: Set[lang.Bit]): lang.Void
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def
__typeArgs: Seq[Type[_]]
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def
__typeParams: Seq[Any]
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def
__typePrefix: String
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- def __write(data: A, addr: Seq[lang.Idx], ens: Set[lang.Bit]): lang.Void
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final
def
asInstanceOf[T0]: T0
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def
buffer: C[A]
Indicate that the memory should be buffered and ignore ignore potential situation where result from running sequentially does not match with resurt from running pipelined
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final
def
canEqual(that: Any): Boolean
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def
clone(): AnyRef
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- protected[java.lang]
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- def coalesce: C[A]
- def dim0: lang.I32
- def dim1: lang.I32
- def dim2: lang.I32
- def dims: Seq[lang.I32]
-
def
effort(e: Int): C[A]
Specify banking search effort for this memory
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final
def
eq(arg0: AnyRef): Boolean
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def
eql(that: C[A]): argon.lang.Bit
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final
def
equals(x: Any): Boolean
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- implicit val evMem: <:<[C[A], RegFile[A, C]]
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implicit
val
evRef: <:<[C[A] @scala.annotation.unchecked.uncheckedVariance, Ref[Any, C[A] @scala.annotation.unchecked.uncheckedVariance]]
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fresh: C[A] @scala.annotation.unchecked.uncheckedVariance
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def
from(c: Any, warnOnLoss: Boolean, errorOnLoss: Boolean, isParam: Boolean, saturating: Boolean, unbiased: Boolean): C[A] @scala.annotation.unchecked.uncheckedVariance
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final
def
getClass(): Class[_]
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def
getFrom(c: Any, isParam: Boolean, saturating: Boolean, unbiased: Boolean): Option[(C[A] @scala.annotation.unchecked.uncheckedVariance, Boolean)]
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final
def
hashCode(): Int
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def
infix_!=(that: Any): argon.lang.Bit
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infix_==(that: Any): argon.lang.Bit
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isInstanceOf[T0]: Boolean
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def
ne(arg0: AnyRef): Boolean
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def
neql(that: C[A]): argon.lang.Bit
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def
nonbuffer: C[A]
Do not buffer memory
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final
def
notify(): Unit
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final
def
notifyAll(): Unit
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- @native()
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def
par(p: lang.I32): C[A]
Creates an alias of this RegFile with parallel access in the last dimension.
-
def
read(addr: Seq[lang.Idx], ens: Set[lang.Bit] = Set.empty): A
Returns the value at
addr
.Returns the value at
addr
. The number of indices should match the RegFile's rank. -
def
reset(cond: lang.Bit): lang.Void
Conditionally resets this RegFile based on
cond
to its inital values (or zeros if unspecified). -
def
reset: lang.Void
Resets this RegFile to its initial values (or zeros, if unspecified).
- def size: lang.I32
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final
def
synchronized[T0](arg0: ⇒ T0): T0
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final
def
toString(): String
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def
toText: argon.lang.Text
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def
unrelated(that: Any): Unit
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value(c: Any): Option[(Any, Boolean)]
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def
wait(): Unit
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def
wait(arg0: Long, arg1: Int): Unit
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final
def
wait(arg0: Long): Unit
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final
def
withCheck[T](x: ⇒ T)(eql: (T) ⇒ Boolean): Option[(T, Boolean)]
- Attributes
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def
write(data: A, addr: Seq[lang.Idx], ens: Set[lang.Bit] = Set.empty): lang.Void
Updates the value at
addr
todata
.Updates the value at
addr
todata
. The number of indices should match the RegFile's rank.